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PhD Computer Science, Dept. of Computer Science and Engineering, IIT Bombay (October 2009)
My PhD Thesis established a competitive flow from algorithms to hardware. We have implemented a high-level synthesis flow that translates algorithms expressed as programs to hardware descriptions. The flow is based on an intermediate representation that factorises the program into three aspects --- control, data and storage. The representation is independent of the programming language used and supports scalable optimisations. The resulting compiler flow produces hardware implementations that are correct by construction --- the behaviour of the hardware is provably equivalent to the original program.
This work was carried out under the guidance of Prof. Kavi Arya and Prof. Madhav P. Desai.
MTech IT, Kanwal Rekhi School of IT, IIT Bombay (December 2002)
My MTech Project involved the design of an FPGA-based Reconfigurable Packet Classifier, intended for the network interface of a PC under the guidance of Prof. Kavi Arya and Prof. D. Manjunath.
BE Electronics from D. J. Sanghvi College of Engineering, Vile Parle, Mumbai (2001)
High School (12th Standard) from the B. N. Bandodkar College of Science, Thane (1997)
Received the National Talent Search (NTS) scholarship from NCERT (1995)
Secondary and Primary schooling at Sau. Anandibai Keshav Joshi English Medium School, Thane (1995)
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And that means ...
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